Datasheet

Chapter 15 Timer Module (TIM16B8CV1) Block Description
Freescale Semiconductor MC9S12C-Family / MC9S12GC-Family 443
Rev 01.24
Write: Anytime
15.3.2.2 Timer Compare Force Register (CFORC)
Read: Anytime but will always return 0x0000 (1 state is transient)
Write: Anytime
15.3.2.3 Output Compare 7 Mask Register (OC7M)
Read: Anytime
Write: Anytime
Table 15-3. TIOS Field Descriptions
Field Description
7:0
IOS[7:0]
Input Capture or Output Compare Channel Configuration
0 The corresponding channel acts as an input capture.
1 The corresponding channel acts as an output compare.
Module Base + 0x0001
76543210
R00000000
W FOC7 FOC6 FOC5 FOC4 FOC3 FOC2 FOC1 FOC0
Reset 0 0 0 00000
Figure 15-7. Timer Compare Force Register (CFORC)
Table 15-4. CFORC Field Descriptions
Field Description
7:0
FOC[7:0]
Force Output Compare Action for Channel 7:0 A write to this register with the corresponding data bit(s) set
causes the action which is programmed for output compare “x” to occur immediately. The action taken is the
same as if a successful comparison had just taken place with the TCx register except the interrupt flag does not
get set.
Note: A successful channel 7 output compare overrides any channel 6:0 compares. If forced output compare on
any channel occurs at the same time as the successful output compare then forced output compare action
will take precedence and interrupt flag won’t get set.
Module Base + 0x0002
76543210
R
OC7M7 OC7M6 OC7M5 OC7M4 OC7M3 OC7M2 OC7M1 OC7M0
W
Reset 0 0 0 00000
Figure 15-8. Output Compare 7 Mask Register (OC7M)