Datasheet

Chapter 14 Serial Peripheral Interface (SPIV3) Block Description
416 MC9S12C-Family / MC9S12GC-Family Freescale Semiconductor
Rev 01.24
14.3.2 Register Descriptions
This section consists of register descriptions in address order. Each description includes a standard register
diagram with an associated figure number. Details of register bit and field function follow the register
diagrams, in bit order.
14.3.2.1 SPI Control Register 1 (SPICR1)
Read: anytime
Write: anytime
Name 7 6 5 4 3 2 1 0
0x0000
SPICR1
R
SPIE SPE SPTIE MSTR CPOL CPHA SSOE LSBFE
W
0x0001
SPICR2
R0 0 0
MODFEN BIDIROE
0
SPISWAI SPC0
W
0x0002
SPIBR
R0
SPPR2 SPPR1 SPPR0
0
SPR2 SPR1 SPR0
W
0x0003
SPISR
R SPIF 0 SPTEF MODF 0 0 0 0
W
0x0004
Reserved
R
W
0x0005
SPIDR
R
Bit 7 6 5 4 3 2 2 Bit 0
W
0x0006
Reserved
R
W
0x0007
Reserved
R
W
= Unimplemented or Reserved
Figure 14-2. SPI Register Summary
Module Base 0x0000
76543210
R
SPIE SPE SPTIE MSTR CPOL CPHA SSOE LSBFE
W
Reset 0 0 0 00100
Figure 14-3. SPI Control Register 1 (SPICR1)