Datasheet

Chapter 13 Serial Communications Interface (S12SCIV2) Block Description
Freescale Semiconductor MC9S12C-Family / MC9S12GC-Family 405
Rev 01.24
Figure 13-18 shows a burst of noise near the beginning of the start bit that resets the RT clock. The sample
after the reset is low but is not preceded by three high samples that would qualify as a falling edge.
Depending on the timing of the start bit search and on the data, the frame may be missed entirely or it may
set the framing error flag.
Figure 13-18. Start Bit Search Example 5
In Figure 13-19, a noise burst makes the majority of data samples RT8, RT9, and RT10 high. This sets the
noise flag but does not reset the RT clock. In start bits only, the RT8, RT9, and RT10 data samples are
ignored.
Figure 13-19. Start Bit Search Example 6
RESET RT CLOCK
RT1 RT1 RT1 RT1 RT1 RT1 RT1 RT1 RT1 RT1 RT2 RT3 RT4 RT7 RT6 RT5 RT1 RT1 RT1 RT1 RT1 RT1 RT1 RT1 RT1 RT1 RT1 RT1
SAMPLES
RT CLOCK
RT CLOCK COUNT
START BIT
Rx Input Signal
11111010
LSB
11 1 1 1 0000000 0
NO START BIT FOUND
RESET RT CLOCK
RT1 RT1 RT1 RT1 RT1 RT1 RT1 RT1 RT1 RT1 RT2 RT3 RT4 RT7 RT6 RT5
RT10
RT9 RT8
RT14 RT13 RT12 RT11 RT15 RT16
RT1 RT2 RT3
SAMPLES
RT CLOCK
RT CLOCK COUNT
START BIT
Rx Input Signal
11111000
LSB
11 1 1 0 110