Datasheet

Chapter 1 MC9S12C and MC9S12GC Device Overview (MC9S12C128)
40 MC9S12C-Family / MC9S12GC-Family Freescale Semiconductor
Rev 01.24
0xXXX2
Extended ID Read: ID14 ID13 ID12 ID11 ID10 ID9 ID8 ID7
Standard ID Read:
CANxRIDR2 Write:
0xXXX3
Extended ID Read: ID6 ID5 ID4 ID3 ID2 ID1 ID0 RTR
Standard ID Read:
CANxRIDR3 Write:
0xXXX4–
0xXXXB
CANxRDSR0–
CANxRDSR7
Read: DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Write:
0xXXXC CANRxDLR
Read:
DLC3 DLC2 DLC1 DLC0
Write:
0xXXXD Reserved
Read:
Write:
0xXXXE CANxRTSRH
Read: TSR15 TSR14 TSR13 TSR12 TSR11 TSR10 TSR9 TSR8
Write:
0xXXXF CANxRTSRL
Read: TSR7 TSR6 TSR5 TSR4 TSR3 TSR2 TSR1 TSR0
Write:
0xxx10
Extended ID Read:
ID28 ID27 ID26 ID25 ID24 ID23 ID22 ID21
CANxTIDR0 Write:
Standard ID
Read:
ID10 ID9 ID8 ID7 ID6 ID5 ID4 ID3
Write:
0xxx11
Extended ID Read:
ID20 ID19 ID18 SRR=1 IDE=1 ID17 ID16 ID15
CANxTIDR1 Write:
Standard ID
Read:
ID2 ID1 ID0 RTR IDE=0
Write:
0xxx12
Extended ID Read:
ID14 ID13 ID12 ID11 ID10 ID9 ID8 ID7
CANxTIDR2 Write:
Standard ID
Read:
Write:
0xxx13
Extended ID Read:
ID6 ID5 ID4 ID3 ID2 ID1 ID0 RTR
CANxTIDR3 Write:
Standard ID
Read:
Write:
0xxx14–
0xxx1B
CANxTDSR0–
CANxTDSR7
Read:
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Write:
0xxx1C CANxTDLR
Read:
DLC3 DLC2 DLC1 DLC0
Write:
0xxx1D CONxTTBPR
Read:
PRIO7 PRIO6 PRIO5 PRIO4 PRIO3 PRIO2 PRIO1 PRIO0
Write:
0xxx1E CANxTTSRH
Read: TSR15 TSR14 TSR13 TSR12 TSR11 TSR10 TSR9 TSR8
Write:
0xxx1F CANxTTSRL
Read: TSR7 TSR6 TSR5 TSR4 TSR3 TSR2 TSR1 TSR0
Write:
Table 1-2. Detailed MSCAN Foreground Receive and Transmit Buffer Layout (continued)
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0