Datasheet

Chapter 13 Serial Communications Interface (S12SCIV2) Block Description
396 MC9S12C-Family / MC9S12GC-Family Freescale Semiconductor
Rev 01.24
13.4.2 Baud Rate Generation
A 13-bit modulus counter in the baud rate generator derives the baud rate for both the receiver and the
transmitter. The value from 0 to 8191 written to the SBR12–SBR0 bits determines the module clock
divisor. The SBR bits are in the SCI baud rate registers (SCIBDH and SCIBDL). The baud rate clock is
synchronized with the bus clock and drives the receiver. The baud rate clock divided by 16 drives the
transmitter. The receiver has an acquisition rate of 16 samples per bit time.
Baud rate generation is subject to one source of error:
Integer division of the module clock may not give the exact target frequency.
Table 13-10 lists some examples of achieving target baud rates with a module clock frequency of 25 MHz
SCI baud rate = SCI module clock / (16 * SCIBR[12:0])
Table 13-10. Baud Rates (Example: Module Clock = 25 MHz)
Bits
SBR[12-0]
Receiver
Clock (Hz)
Transmitter
Clock (Hz)
Target Baud
Rate
Error
(%)
41 609,756.1 38,109.8 38,400 .76
81 308,642.0 19,290.1 19,200 .47
163 153,374.2 9585.9 9600 .16
326 76,687.1 4792.9 4800 .15
651 38,402.5 2400.2 2400 .01
1302 19,201.2 1200.1 1200 .01
2604 9600.6 600.0 600 .00
5208 4800.0 300.0 300 .00