Datasheet

Chapter 12 Pulse-Width Modulator (PWM8B6CV1) Block Description

Freescale Semiconductor MC9S12C-Family / MC9S12GC-Family 359

Rev 01.24

Read: anytime

Write: anytime

There are three control bits for concatenation, each of which is used to concatenate a pair of PWM

channels into one 16-bit channel. When channels 4 and 5 are concatenated, channel 4 registers become the

high-order bytes of the double-byte channel. When channels 2 and 3 are concatenated, channel 2 registers

become the high-order bytes of the double-byte channel. When channels 0 and 1 are concatenated,

channel 0 registers become the high-order bytes of the double-byte channel.

Reference Section 12.4.2.7, “PWM 16-Bit Functions,” for a more detailed description of the concatenation

PWM function.

NOTE

Change these bits only when both corresponding channels are disabled.

Module Base + 0x0005

76543210

CON45 CON23 CON01 PSWAI PFRZ

Reset 0 0 0 00000

= Unimplemented or Reserved

Figure 12-8. PWM Control Register (PWMCTL)