Datasheet
Chapter 8 Analog-to-Digital Converter (ATD10B8C) Block Description
230 MC9S12C-Family / MC9S12GC-Family Freescale Semiconductor
Rev 01.24
8.3.2 Register Descriptions
This section describes in address order all the ATD10B8C registers and their individual bits.
8.3.2.1 Reserved Register (ATDCTL0)
Read: Always read $00 in normal modes
Write: Unimplemented in normal modes
8.3.2.2 Reserved Register (ATDCTL1)
Read: Always read $00 in normal modes
Write: Unimplemented in normal modes
NOTE
Writing to this registers when in special modes can alter functionality.
Module Base + 0x0000
76543210
R00000000
W
Reset 0 0 0 00000
= Unimplemented or Reserved
Figure 8-3. Reserved Register (ATDCTL0)
Module Base + 0x0001
76543210
R00000000
W
Reset 0 0 0 00000
= Unimplemented or Reserved
Figure 8-4. Reserved Register (ATDCTL1)