Datasheet

Chapter 1 MC9S12C and MC9S12GC Device Overview (MC9S12C128)
Freescale Semiconductor MC9S12C-Family / MC9S12GC-Family 19
Rev 01.24
• Operating frequency:
— 32MHz equivalent to 16MHz bus speed for single chip
— 32MHz equivalent to 16MHz bus speed in expanded bus modes
— Option of 9S12C Family: 50MHz equivalent to 25MHz bus speed
— All 9S12GC Family members allow a 50MHz operating frequency.
• Internal 2.5V regulator:
— Supports an input voltage range from 2.97V to 5.5V
— Low power mode capability
— Includes low voltage reset (LVR) circuitry
— Includes low voltage interrupt (LVI) circuitry
• 48-pin LQFP, 52-pin LQFP, or 80-pin QFP package:
— Up to 58 I/O lines with 5V input and drive capability (80-pin package)
— Up to 2 dedicated 5V input only lines (IRQ, XIRQ)
— 5V 8 A/D converter inputs and 5V I/O
• Development support:
— Single-wire background debug™ mode (BDM)
— On-chip hardware breakpoints
— Enhanced DBG12 debug features
1.1.2 Modes of Operation
User modes (expanded modes are only available in the 80-pin package version).
• Normal and emulation operating modes:
— Normal single-chip mode
— Normal expanded wide mode
— Normal expanded narrow mode
— Emulation expanded wide mode
— Emulation expanded narrow mode
• Special operating modes:
— Special single-chip mode with active background debug mode
— Special test mode (Freescale use only)
— Special peripheral mode (Freescale use only)
• Low power modes:
— Stop mode
— Pseudo stop mode
— Wait mode