Datasheet

Chapter 4 Multiplexed External Bus Interface (MEBIV3)
Freescale Semiconductor MC9S12C-Family / MC9S12GC-Family 143
Rev 01.24
4.3.2.9 Mode Register (MODE)
Read: Anytime (provided this register is in the map).
Write: Each bit has specific write conditions. Please refer to the descriptions of each bit on the following
pages.
The MODE register is used to establish the operating mode and other miscellaneous functions (i.e.,
internal visibility and emulation of port E and K).
In special peripheral mode, this register is not accessible but it is reset as shown to system configuration
features. Changes to bits in the MODE register are delayed one cycle after the write.
This register is not in the on-chip memory map in expanded and special peripheral modes. Therefore, these
accesses will be echoed externally.
Module Base + 0x000B
Starting address location affected by INITRG register setting.
76543210
R
MODC MODB MODA
0
IVIS
0
EMK EME
W
Reset
Special Single Chip 0 0 0 0 0 0 0 0
Emulation Expanded
Narrow
00101011
Special Test 0 1 0 0 1 0 0 0
Emulation Expanded
Wide
01101011
Normal Single Chip 1 0 0 0 0 0 0 0
Normal Expanded
Narrow
10100000
Peripheral 1 1 0 0 0 0 0 0
Normal Expanded Wide 1 1 1 0 0 0 0 0
= Unimplemented or Reserved
Figure 4-13. Mode Register (MODE)