Datasheet

Chapter 3 Module Mapping Control (MMCV4) Block Description
120 MC9S12C-Family / MC9S12GC-Family Freescale Semiconductor
Rev 01.24
NOTE
As stated, the bits in this register provide read visibility to the system
memory space and on-chip/off-chip partitioning allocations defined at
system integration. The actual array size for any given type of memory
block may differ from the allocated size. Please refer to the device overview
chapter for actual sizes.
Table 3-10. MEMSIZ0 Field Descriptions
Field Description
7:6
ROM_SW[1:0]
Allocated System FLASH or ROM Physical Memory Space — The allocated system FLASH or ROM
physical memory space is as given in Table 3-11.
1:0
PAG_SW[1:0]
Allocated Off-Chip FLASH or ROM Memory Space The allocated off-chip FLASH or ROM memory space
size is as given in Table 3-12.
Table 3-11. Allocated FLASH/ROM Physical Memory Space
rom_sw1:rom_sw0
Allocated FLASH
or ROM Space
00 0K byte
01 16K bytes
10 48K bytes
(1)
11 64K bytes
(1)
NOTES:
1. The ROMHM software bit in the MISC register determines the accessibility of the
FLASH/ROM memory space. Please refer to Section 3.3.2.8, “Memory Size Register 1
(MEMSIZ1),” for a detailed functional description of the ROMHM bit.
Table 3-12. Allocated Off-Chip Memory Options
pag_sw1:pag_sw0 Off-Chip Space On-Chip Space
00 876K bytes 128K bytes
01 768K bytes 256K bytes
10 512K bytes 512K bytes
11 0K byte 1M byte