Datasheet

Chapter 8 Analog-to-Digital Converter (ATD10B8C) Block Description
Freescale Semiconductor MC9S12C-Family / MC9S12GC-Family 229
Rev 01.24
NOTE
Register Address = Module Base Address + Address Offset, where the
Module Base Address is defined at the MCU level and the Address Offset is
defined at the module level.
0x001C ATDDR6H
R0
0
0
0
0
0
0
0
0
0
0
0
BIT 9 MSB
0
BIT 8
0
W
0x001D ATDDR6L
R BIT 7
BIT 7 MSB
BIT 6
BIT 6
BIT 5
BIT 5
BIT 4
BIT 4
BIT 3
BIT 3
BIT 2
BIT 2
BIT 1
BIT 1
BIT 0
BIT 0
W
0x001E ATDDR7H
R0
0
0
0
0
0
0
0
0
0
0
0
BIT 9 MSB
0
BIT 8
0
W
0x001F ATDDR7L
R BIT 7
BIT 7 MSB
BIT 6
BIT 6
BIT 5
BIT 5
BIT 4
BIT 4
BIT 3
BIT 3
BIT 2
BIT 2
BIT 1
BIT 1
BIT 0
BIT 0
W
Address Name Bit 7 6 5 4 3 2 1 Bit 0
= Unimplemented or Reserved
Figure 8-2. ATD Register Summary (Sheet 4 of 4)