Datasheet
Table Of Contents
- List of Sections
- Table of Contents
- General Description
- Central Processing Unit (CPU)
- Pinout and Signal Description
- System Configuration
- Registers
- Operating Modes
- Resource Mapping
- Bus Control and Input/Output
- Resets and Interrupts
- Voltage Regulator (VREG)
- Flash EEPROM 256K
- EEPROM 4K
- Port Integration Module
- Clocks and Reset Generator (CRG)
- Pulse Width Modulator (PWM)
- Enhanced Capture Timer (ECT)
- Serial Communications Interface (SCI)
- Serial Peripheral Interface (SPI)
- Inter-IC Bus (IIC)
- MSCAN
- Analog to Digital Converter
- Byte Data Link Controller Module
- Contents
- Overview
- Features
- Block Diagram
- Register Map
- Functional Description
- Register Descriptions
- External Pin Descriptions
- Reset Initialization/Basic Operation
- Transmitting A Message
- Receiving A Message
- Transmitting An In-Frame Response (IFR)
- Receiving An In-Frame Response (IFR)
- Special BDLC Operations
- Modes of Operation
- Interrupt Operation
- Low Power Options
- Background Debug Module (BDM)
- Breakpoint (BKP) Module
- Revision History
- Glossary
- Literature Updates

Operating Modes
Operating Modes
MC9S12DP256 — Revision 1.1
Operating Modes
Special Test Mode — In expanded wide modes, Ports A and B
are configured as a 16-bit multiplexed address and data bus and
Port E provides bus control and status signals. In special test
mode, the write protection of many control bits is lifted so that they
can be thoroughly tested without needing to go through reset.
Test Operating
Mode
There is a test operating mode in which an external master, such as an
I.C. tester, can control the on-chip peripherals.
Peripheral Mode — This mode is intended for Motorola factory
testing of the MCU. In this mode, the CPU is inactive and an
external (tester) bus master drives address, data and bus control
signals in through Ports A, B and E. In effect, the whole MCU acts
as if it was a peripheral under control of an external CPU. This
allows faster testing of on-chip memory and peripherals than
previous testing methods. Since the mode control register is not
accessible in peripheral mode, the only way to change to another
mode is to reset the MCU into a different mode. Background
debugging should not be used while the MCU is in special
peripheral mode as internal bus conflicts between BDM and the
external master can cause improper operation of both functions.
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
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