Datasheet
Table Of Contents
- List of Sections
- Table of Contents
- General Description
- Central Processing Unit (CPU)
- Pinout and Signal Description
- System Configuration
- Registers
- Operating Modes
- Resource Mapping
- Bus Control and Input/Output
- Resets and Interrupts
- Voltage Regulator (VREG)
- Flash EEPROM 256K
- EEPROM 4K
- Port Integration Module
- Clocks and Reset Generator (CRG)
- Pulse Width Modulator (PWM)
- Enhanced Capture Timer (ECT)
- Serial Communications Interface (SCI)
- Serial Peripheral Interface (SPI)
- Inter-IC Bus (IIC)
- MSCAN
- Analog to Digital Converter
- Byte Data Link Controller Module
- Contents
- Overview
- Features
- Block Diagram
- Register Map
- Functional Description
- Register Descriptions
- External Pin Descriptions
- Reset Initialization/Basic Operation
- Transmitting A Message
- Receiving A Message
- Transmitting An In-Frame Response (IFR)
- Receiving An In-Frame Response (IFR)
- Special BDLC Operations
- Modes of Operation
- Interrupt Operation
- Low Power Options
- Background Debug Module (BDM)
- Breakpoint (BKP) Module
- Revision History
- Glossary
- Literature Updates

Glossary
MC9S12DP256 — Revision 1.1
Glossary
hexadecimal — Base 16 numbering system that uses the digits 0
through 9 and the letters A through F.
high byte — The most significant eight bits of a word.
illegal address — An address not within the memory map
illegal opcode — A nonexistent opcode.
index registers (IX and IY) — Two 16-bit registers in the CPU. In the
indexed addressing modes, the CPU uses the contents of IX or
IY to determine the effective address of the operand. IX and IY
can also serve as a temporary data storage locations.
input/output (I/O) — Input/output interfaces between a computer
system and the external world. A CPU reads an input to sense the
level of an external signal and writes to an output to change the
level on an external signal.
instructions — Operations that a CPU can perform. Instructions are
expressed by programmers as assembly language mnemonics.
A CPU interprets an opcode and its associated operand(s) and
instruction.
interrupt — A temporary break in the sequential execution of a program
to respond to signals from peripheral devices by executing a
subroutine.
interrupt request — A signal from a peripheral to the CPU intended to
cause the CPU to execute a subroutine.
I/O — See “input/output (I/0).”
jitter — Short-term signal instability.
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
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