Datasheet

Breakpoint (BKP) Module
Functional Description
MC9S12DP256 — Revision 1.1
Breakpoint (BKP) Module
Data (Second
Address) Low Byte
Breakpoint
Register (BKP1L)
In Dual Mode, this register is used to compare against the low order
address lines. In Full Mode, this register is used to compare against the
low order data lines.
Read and write: anytime
Functional Description
There are three main sub-blocks in the breakpoint module.
Register Block This block contains the eight registers which make up the BKP register
space.
Compare Block This block contains all logic necessary to perform the required address
and data signal comparisons.
Control Block This block contains the generation and drive logic for the tag high, tag
low, force SWI and force BDM signals for the CPU. It also generates the
register read and write signals and comparator block enables.
NOTE: There is a two cycle latency for address compares for forces, two cycle
latency for write data compares, and a three cycle latency for read data
compares.
Address $__07
Bit 7 654321Bit 0
Read:
Bit 7 654321Bit 0
Write:
Reset: 00000000
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...