Datasheet

Table Of Contents
Breakpoint (BKP) Module
Register Descriptions
MC9S12DP256 — Revision 1.1
Breakpoint (BKP) Module
BK1MBH:BK1MBL — Breakpoint Mask High Byte and Low Byte of Data
(Second Address)
In Dual Mode, these bits may be used to mask (disable) the
comparison of the high and/or low bytes of the second address
breakpoint. (See Table 125.).
The x:0 case is for a Full Address Compare. When a program page is
selected the full address compare will be based on bits
{mmc_xab[19:14],mmc_ab_t2[13:0]} for a 20-bit compare. The
registers used for the compare are
{BKP1X[5:0],BKP1H[5:0],BKP1L[7:0]}. When a program page is not
selected the full address compare will be based on bits
mmc_ab_t2[15:0] for a 16-bit compare. The registers used for the
compare are {BKP1H[7:0],BKP1L[7:0]}.
The 1:0 case is not sensible because it would ignore the high order
address and compare the low order and expansion addresses. Logic
forces this case to compare all address lines (effectively ignoring the
BK1MBH control bit).
The 1:1 case is useful for triggering a breakpoint on any access to a
particular expansion page. This only makes sense if a program page
is being accessed so the breakpoint trigger will only occur if BKP1X
compares.
Table 125 Breakpoint Mask Bits for Second Address (Dual Mode)
BK1MBH:BK1MBL Address Compare BKP1X BKP1H BKP1L
x:0 Full Address Compare
Ye s
(1)
Ye s Ye s
0:1 256 byte Address Range
Ye s
(1)
Ye s N o
1:1 16K byte Address Range
Ye s
(1)
No No
1. If page is selected.
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