Datasheet
Table Of Contents
- List of Sections
- Table of Contents
- General Description
- Central Processing Unit (CPU)
- Pinout and Signal Description
- System Configuration
- Registers
- Operating Modes
- Resource Mapping
- Bus Control and Input/Output
- Resets and Interrupts
- Voltage Regulator (VREG)
- Flash EEPROM 256K
- EEPROM 4K
- Port Integration Module
- Clocks and Reset Generator (CRG)
- Pulse Width Modulator (PWM)
- Enhanced Capture Timer (ECT)
- Serial Communications Interface (SCI)
- Serial Peripheral Interface (SPI)
- Inter-IC Bus (IIC)
- MSCAN
- Analog to Digital Converter
- Byte Data Link Controller Module
- Contents
- Overview
- Features
- Block Diagram
- Register Map
- Functional Description
- Register Descriptions
- External Pin Descriptions
- Reset Initialization/Basic Operation
- Transmitting A Message
- Receiving A Message
- Transmitting An In-Frame Response (IFR)
- Receiving An In-Frame Response (IFR)
- Special BDLC Operations
- Modes of Operation
- Interrupt Operation
- Low Power Options
- Background Debug Module (BDM)
- Breakpoint (BKP) Module
- Revision History
- Glossary
- Literature Updates

Breakpoint (BKP) Module
MC9S12DP256 — Revision 1.1
Breakpoint (BKP) Module
There are two types of breakpoints: tagged and forced. Forced
breakpoints occur at the next instruction boundary if a match occurs and
tagged breakpoints allow breaking just before a specific instruction
executes. Tagged breakpoints will only occur on addresses. Tagging on
data is not allowed; however, if this occurs, nothing will occur within the
BKP module.
The breakpoint module allows breaking within a 256 byte address range
and/or within expanded memory, allows matching of the data bus as well
as address matching, allows breakpoints to match 8 bit or 16 bit data,
and allows forced breakpoints to match on a read or write cycle.
Features
• Full or Dual Breakpoint Mode
– Compare on address and data (Full)
– Compare on either of two addresses (Dual)
• BDM or SWI Breakpoint
– Enter BDM on breakpoint (BDM)
– Execute SWI on breakpoint (SWI)
• Tagged or Forced Breakpoint
– Break just before a specific instruction will begin execution
(TAG)
– Break on the first instruction boundary after a match occurs
(Force)
• Single, Range, or Page address compares
– Compare on address (Single)
– Compare on address 256 byte (Range)
– Compare on any 16K Page (Page)
• Compare address on read or write on forced breakpoints
• High and/or low byte data compares
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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