Datasheet
Table Of Contents
- List of Sections
- Table of Contents
- General Description
- Central Processing Unit (CPU)
- Pinout and Signal Description
- System Configuration
- Registers
- Operating Modes
- Resource Mapping
- Bus Control and Input/Output
- Resets and Interrupts
- Voltage Regulator (VREG)
- Flash EEPROM 256K
- EEPROM 4K
- Port Integration Module
- Clocks and Reset Generator (CRG)
- Pulse Width Modulator (PWM)
- Enhanced Capture Timer (ECT)
- Serial Communications Interface (SCI)
- Serial Peripheral Interface (SPI)
- Inter-IC Bus (IIC)
- MSCAN
- Analog to Digital Converter
- Byte Data Link Controller Module
- Contents
- Overview
- Features
- Block Diagram
- Register Map
- Functional Description
- Register Descriptions
- External Pin Descriptions
- Reset Initialization/Basic Operation
- Transmitting A Message
- Receiving A Message
- Transmitting An In-Frame Response (IFR)
- Receiving An In-Frame Response (IFR)
- Special BDLC Operations
- Modes of Operation
- Interrupt Operation
- Low Power Options
- Background Debug Module (BDM)
- Breakpoint (BKP) Module
- Revision History
- Glossary
- Literature Updates

Background Debug Module (BDM)
Operation
MC9S12DP256 — Revision 1.1
Background Debug Module (BDM)
The tag follows program information as it advances through the
instruction queue. When a tagged instruction reaches the head of the
queue, the CPU enters active BDM rather than executing the instruction.
NOTE:
Tagging is disabled when BDM becomes active and BDM serial
commands are not processed while tagging is active.
Executing the BDM TAGGO command configures two system pins for
tagging. The TAGLO
signal shares a pin with the LSTRB signal, and the
TAGHI
signal shares a pin with the BKGD signal.
Table 123 shows the functions of the two tagging pins. The pins operate
independently, that is, the state of one pin does not affect the function of
the other. The presence of logic level 0 on either pin at the fall of the
external clock (ECLK) performs the indicated function. High tagging is
allowed in all modes. Low tagging is allowed only when low strobe is
enabled (LSTRB is allowed only in wide expanded modes and emulation
expanded narrow mode).
Table 123 Tag Pin Function
TAGHI TAGLO Tag
1 1 No tag
1 0 Low byte
0 1 High byte
0 0 Both bytes
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...