Datasheet

ManualsBrandsNXP SEMICONDUCTORS ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller QFP 80 (14x14) 16-Bit 25 MHz I/O number 59

Table Of Contents

List of Sections
Table of Contents
General Description
- Contents
- Introduction
- Features
- MC9S12DP256 112-Pin Block Diagram
- Ordering Information
Central Processing Unit (CPU)
- Contents
- Introduction
- Programming Model
- Data Types
- Addressing Modes
- Indexed Addressing Modes
- Opcodes and Operands
- Instruction Set Summary
Pinout and Signal Description
- Contents
- MC9S12DP256 Pin Assignments in 112-pin QFP
- Power Supply Pins
- Signal Descriptions
- Port Signals
System Configuration
- Contents
- Introduction
- Modules Variabilities
- MCU Variabilities
Registers
- Contents
- Register Block
Operating Modes
- Contents
- Introduction
- Operating Modes
- Background Debug Mode
- Security
Resource Mapping
- Contents
- Introduction
- Internal Resource Mapping
- Flash EEPROM mapping through internal Memory Expansion
- Miscellaneous System Control Register
- Memory Maps
Bus Control and Input/Output
- Contents
- Introduction
- Detecting Access Type from External Signals
- Stretched Bus Cycles
- PIPE Status Signals
- Registers
Resets and Interrupts
- Contents
- Introduction
- Register Map
- Exception Priority
- Maskable interrupts
- Latching of Interrupts
- Register Descriptions
- Resets
- Effects of Reset
- Register Stacking
Voltage Regulator (VREG)
- Contents
- Overview
- Features
- Block Diagram
- Functional Description
- External Pin Connection
- Reset Initialization
- Modes of Operation
Flash EEPROM 256K
- Contents
- Glossary
- Overview
- Features
- Block Diagram
- Module Memory Map
- Functional Description
- Register Descriptions
- External Pin Descriptions
- Reset Initialization
- Modes of Operation
- Low Power Options
- Interrupt Operation
EEPROM 4K
- Contents
- Glossary
- Overview
- Features
- Block Diagram
- Module Memory Map
- Functional Description
- Register Descriptions
- External Pin Descriptions
- Reset Initialization
- Modes of Operation
- Interrupt Operation
Port Integration Module
- Contents
- Overview
- Block Diagram
- External Pin Descriptions
- 80 Pin QFP bond-out version
- Register Map
- Register Descriptions
- Reset Initialization
- Functional Description
- Low Power Options
- Interrupt Operation
Clocks and Reset Generator (CRG)
- Contents
- Overview
- Features
- Block Diagram
- Register Map
- Functional Description
- Register Descriptions
- External Pin Descriptions
- Reset Initialization
- Interrupt Operation
- Low Power Options
Pulse Width Modulator (PWM)
- Contents
- Overview
- Features
- Block Diagram
- External Pin Descriptions
- Register Map
- Register Descriptions
- Functional Description
- Reset Initialization
- Modes of Operation
- Low Power Options
- Interrupt Operation
Enhanced Capture Timer (ECT)
- Contents
- Overview
- Features
- Modes of Operation
- Abbreviations
- Block Diagram
- Signal Descriptions
- Module Memory Map
- Register Quick Reference
- Register Descriptions
- Modes of Operation
- Interrupts
- Description of Interrupt Operation
Serial Communications Interface (SCI)
- Contents
- Overview
- Features
- Modes of Operation
- SCI Interface Diagram
- Block Diagram
- Signal Descriptions
- Module Memory Map
- Register Quick Reference
- Register Descriptions
- Functional Description
- Modes of Operation
- Interrupt Operation
Serial Peripheral Interface (SPI)
- Contents
- Overview
- Features
- Modes of Operation
- Block Diagram
- Signal Descriptions
- Module Memory Map
- Register Quick Reference
- Register Descriptions
- Functional Description
- Low Power Mode Options
- Errata
- Reset
- Interrupts
Inter-IC Bus (IIC)
- Contents
- Overview
- Features
- Modes of Operation
- Block Diagram
- Signal Descriptions
- Module Memory Map
- Register Quick Reference
- Register Descriptions
- I-Bus Protocol
- Interrupt Operation
- Modes of Operation
- Programming
MSCAN
- Contents
- Overview
- Features
- Block Diagram
- External Pin Descriptions
- Register Map
- Functional Description
- Register Descriptions
- Modes of Operation
- Low Power Options
- Interrupt Operation
Analog to Digital Converter
- Contents
- Overview
- Features
- Block Diagram
- Register Map
- Functional Description
- Register Descriptions
- External Pin Descriptions
- Reset Initialization
- Modes of Operation
- Sample Conversion
- General Purpose Input Ports
Byte Data Link Controller Module
- Contents
- Overview
- Features
- Block Diagram
- Register Map
- Functional Description
- Register Descriptions
- External Pin Descriptions
- Reset Initialization/Basic Operation
- Transmitting A Message
- Receiving A Message
- Transmitting An In-Frame Response (IFR)
- Receiving An In-Frame Response (IFR)
- Special BDLC Operations
- Modes of Operation
- Interrupt Operation
- Low Power Options
Background Debug Module (BDM)
- Contents
- Overview
- Interface Signals
- Registers
- Operation
- Modes of Operation
- Low-Power Options
- Interrupt Operation
Breakpoint (BKP) Module
- Contents
- Overview
- Features
- Block Diagram
- External Pin Descriptions
- Register Descriptions
- Functional Description
- Breakpoint Operating Modes
- Breakpoint Types
- Modes of Operation
- Low Power Options
- Reset Initialization
- Interrupt Operation
- General Purpose I/O Ports
Revision History
- Changes from Rev 1.0 to Rev 1.1
Glossary
Literature Updates
- Literature Distribution Centers
- Customer Focus Center
- Microcontroller Division’s Web Site

Registers

MC9S12DP256 — Revision 1.1

Registers

$0056 TC3 (hi)

Read:

Bit 15 14 13 12 11 10 9 Bit 8

Enhanced Capture Timer

Write:

$0057 TC3 (lo)

Read:

Bit 7 6 5 4 3 2 1 Bit 0

Write:

$0058 TC4 (hi)

Read:

Bit 15 14 13 12 11 10 9 Bit 8

Write:

$0059 TC4 (lo)

Read:

Bit 7 6 5 4 3 2 1 Bit 0

Write:

$005A TC5 (hi)

Read:

Bit 15 14 13 12 11 10 9 Bit 8

Write:

$005B TC5 (lo)

Read:

Bit 7 6 5 4 3 2 1 Bit 0

Write:

$005C TC6 (hi)

Read:

Bit 15 14 13 12 11 10 9 Bit 8

Write:

$005D TC6 (lo)

Read:

Bit 7 6 5 4 3 2 1 Bit 0

Write:

$005E TC7 (hi)

Read:

Bit 15 14 13 12 11 10 9 Bit 8

Write:

$005F TC7 (lo)

Read:

Bit 7 6 5 4 3 2 1 Bit 0

Write:

$0060 PACTL

PAEN PAMOD PEDGE CLK1 CLK0 PAOVI PAI

Write:

$0061 PAFLG

PAOVF PAIF

Write:

$0062 PACN3 (hi)

Read:

Bit 7 6 5 4 3 2 1 Bit 0

Write:

$0063 PACN2 (lo)

Read:

Bit 7 6 5 4 3 2 1 Bit 0

Write:

$0064 PACN1 (hi)

Read:

Bit 7 6 5 4 3 2 1 Bit 0

Write:

$0065 PACN0 (lo)

Read:

Bit 7 6 5 4 3 2 1 Bit 0

Write:

$0066 MCCTL

Read:

MCZI MODMC RDMCL

FLMC MCEN MCPR1 MCPR0

Write: ICLAT

$0067 MCFLG

Read:

MCZF

000

POLF3 POLF2 POLF1 POLF0

Write:

$0068 ICPAR

PA3EN PA2EN PA1EN PA0EN

Write:

$0069 DLYCT

DLY1 DLY0

Write:

$006A ICOVW

Read:

NOVW7 NOVW6 NOVW5 NOVW4 NOVW3 NOVW2 NOVW1 NOVW0

Write:

$006B ICSYS

Read:

SH37 SH26 SH15 SH04 TFMOD PACMX BUFEN LATQ

Write:

$006C Reserved

Read:

Write:

Freescale Semiconductor, I

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

nc...