Datasheet
Table Of Contents
- List of Sections
- Table of Contents
- General Description
- Central Processing Unit (CPU)
- Pinout and Signal Description
- System Configuration
- Registers
- Operating Modes
- Resource Mapping
- Bus Control and Input/Output
- Resets and Interrupts
- Voltage Regulator (VREG)
- Flash EEPROM 256K
- EEPROM 4K
- Port Integration Module
- Clocks and Reset Generator (CRG)
- Pulse Width Modulator (PWM)
- Enhanced Capture Timer (ECT)
- Serial Communications Interface (SCI)
- Serial Peripheral Interface (SPI)
- Inter-IC Bus (IIC)
- MSCAN
- Analog to Digital Converter
- Byte Data Link Controller Module
- Contents
- Overview
- Features
- Block Diagram
- Register Map
- Functional Description
- Register Descriptions
- External Pin Descriptions
- Reset Initialization/Basic Operation
- Transmitting A Message
- Receiving A Message
- Transmitting An In-Frame Response (IFR)
- Receiving An In-Frame Response (IFR)
- Special BDLC Operations
- Modes of Operation
- Interrupt Operation
- Low Power Options
- Background Debug Module (BDM)
- Breakpoint (BKP) Module
- Revision History
- Glossary
- Literature Updates

Background Debug Module (BDM)
Operation
MC9S12DP256 — Revision 1.1
Background Debug Module (BDM)
Hardware commands can be executed at any time and in any mode
excluding a few exceptions as highlighted in Modes of Operation below.
Firmware commands can only be executed when the system is in active
background debug mode (BDM).
Security If the user resets into special single chip mode with the system secured,
a SECURE BDM FIRMWARE lookup table is brought into the map
overlapping a portion of the STANDARD BDM FIRMWARE lookup table.
The secure BDM firmware verifies that the on-chip EEPROM and Flash
EEPROM are erased. This being the case, the UNSEC bit will get set.
The BDM program jumps to the start of the standard BDM firmware and
the secure BDM firmware is turned off.
Enabling and
Activating BDM
The system must be in active BDM to execute standard BDM firmware
commands. BDM can be activated only after being enabled. BDM is
enabled by setting the ENBDM bit in the BDM status (BDMSTS) register.
The ENBDM bit is set by writing to the BDM status (BDMSTS) register,
via the single-wire interface, using a hardware command such as
WRITE_BD_BYTE.
After being enabled, BDM is activated by one of the following
1
:
• Hardware BACKGROUND command
• BDM external instruction tagging mechanism
• CPU BGND instruction
• Breakpoint sub-block’s force or tag mechanism
2
When BDM is activated, the CPU finishes executing the current
instruction and then begins executing the firmware in the standard BDM
firmware lookup table. When BDM is activated by the breakpoint
sub-block, the type of breakpoint used determines if BDM becomes
active before or after execution of the next instruction.
1. BDM is enabled and active immediately out of special single-chip reset (see Special Opera-
tion).
2. This method is only available on systems that have a a Breakpoint sub-block.
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
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