Datasheet

Table Of Contents
Background Debug Module
MC9S12DP256 — Revision 1.1
Background Debug Module (BDM)
Figure 137 BDM Register Map Summary
BDM Status
Register (BDMSTS)
Read: All modes through BDM operation
Write: All modes but subject to the following:
BDMACT can only be set by BDM hardware upon entry into
BDM. It can only be cleared by the standard BDM firmware
lookup table upon exit from BDM active mode.
CLKSW can only be written via BDM hardware or standard
BDM firmware write commands.
All other bits, while writable via BDM hardware or standard
BDM firmware write commands, should only be altered by the
BDM hardware or standard firmware lookup table as part of
BDM command execution.
$FF06 BDMCCR
Read:
CCR7 CCR6 CCR5 CCR4 CCR3 CCR2 CCR1 CCR0
Write:
$FF07 BDMINR
Read: REG15 REG14 REG13 REG12 REG11 0 0 0
Write:
Address
Register
Name
Bit 7 654321Bit 0
= Unimplemented X = Indeterminate
Address: $FF01
Bit 7 6 54321Bit 0
Read:
ENBDM BDMACT ENTAG SDV TRACE CLKSW
UNSEC 0
Write:
Reset:
Special single-chip mode: 0 1 000000
Special peripheral mode: 0 1 000000
All other modes: 0 0 000000
= Unimplemented
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