Datasheet

Background Debug Module (BDM)
Registers
MC9S12DP256 — Revision 1.1
Background Debug Module (BDM)
High Byte
Instruction
Tagging Pin
(TAGHI
)
This pin is used to tag the high byte of an instruction. When instruction
tagging is on, a logic 0 at the falling edge of the external clock (ECLK)
tags the high half of the instruction word being read into the instruction
queue.
Low Byte
Instruction
Tagging Pin
(TAGLO
)
This pin is used to tag the low byte of an instruction. When instruction
tagging is on and low strobe is enabled, a logic 0 at the falling edge of
the external clock (ECLK) tags the low half of the instruction word being
read into the instruction queue.
Registers
A summary of the registers associated with the BDM is shown in
Figure 137 below. Registers are accessed by host-driven
communications to the BDM hardware using READ_BD and WRITE_BD
commands. Detailed descriptions of the registers and associated bits
are given in the subsections that follow.
Address
Register
Name
Bit 7 654321Bit 0
$FF00 BDM reserved
Read: XXXXXX00
Write:
$FF01 BDMSTS
Read:
ENBDM BDMACT ENTAG SDV TRACE CLKSW
UNSEC 0
Write:
$FF02 BDM reserved
Read: XXXXXXXX
Write:
$FF03 BDM reserved
Read: XXXXXXXX
Write:
$FF04 BDM reserved
Read: XXXXXXXX
Write:
$FF05 BDM reserved
Read: XXXXXXXX
Write:
= Unimplemented X = Indeterminate
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