Datasheet
Table Of Contents
- List of Sections
- Table of Contents
- General Description
- Central Processing Unit (CPU)
- Pinout and Signal Description
- System Configuration
- Registers
- Operating Modes
- Resource Mapping
- Bus Control and Input/Output
- Resets and Interrupts
- Voltage Regulator (VREG)
- Flash EEPROM 256K
- EEPROM 4K
- Port Integration Module
- Clocks and Reset Generator (CRG)
- Pulse Width Modulator (PWM)
- Enhanced Capture Timer (ECT)
- Serial Communications Interface (SCI)
- Serial Peripheral Interface (SPI)
- Inter-IC Bus (IIC)
- MSCAN
- Analog to Digital Converter
- Byte Data Link Controller Module
- Contents
- Overview
- Features
- Block Diagram
- Register Map
- Functional Description
- Register Descriptions
- External Pin Descriptions
- Reset Initialization/Basic Operation
- Transmitting A Message
- Receiving A Message
- Transmitting An In-Frame Response (IFR)
- Receiving An In-Frame Response (IFR)
- Special BDLC Operations
- Modes of Operation
- Interrupt Operation
- Low Power Options
- Background Debug Module (BDM)
- Breakpoint (BKP) Module
- Revision History
- Glossary
- Literature Updates

Byte Data Link
MC9S12DP256 — Revision 1.1
Byte Data Link Controller Module
When an EOF is
Received, the IFR
(and Message) is
Complete
Once all IFR bytes (including the possible CRC byte) have been
received from the bus, the bus will again be idle for a time period equal
to an EOD symbol. Following this, the BDLC will determine whether or
not the last byte of the IFR is a CRC byte, and if so verify that the CRC
byte is correct. If the CRC byte is not correct, this will be reflected in the
DLCBSVR.
After an additional period of time the EOD symbol will transition into an
EOF symbol. When the EOF is received it will be reflected in the
DLCBSVR, indicating to the user that the IFR, and the message, is
complete.
.
Figure 134 Receiving An IFR With the BDLC
Enter IFR Receive
Routine
Is DLCBSVR = $1C/$18?
No
Store received IFR byte
(in case of LOA)
Is this IFR
Yes
No
Is DLCBSVR = $04?
No
Yes
(EOF)
of any interest?
Is this an IFR
Yes
No
xmit reflection?
Yes
Once BDLC Detects
EOF, IFR
Discard received
IFR bytes
reception is complete
Yes
No
Is DLCBSVR = $08?
Exit IFR Receive
Routine
(Error Detected)
(RxIFR)
Read byte in DLCBDR
Filter received IFR byte
Set IMSG bit in DLCBCR1
Store received IFR byte
B
B
B
A
A
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Freescale Semiconductor, Inc.
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