Datasheet

Byte Data Link Controller Module
Transmitting An In-Frame Response (IFR)
MC9S12DP256 — Revision 1.1
Byte Data Link Controller Module
NOTE: As when transmitting a message, when transmitting a Type 3 IFR the
user may write two, or possibly even three of the bytes to be transmitted
into the DLCBDR before the first RxIFR interrupt occurs. For this reason,
the user should never use receive IFR byte interrupts to control the
sequencing of IFR bytes to be transmitted.
Step 4: Write the
Last IFR Byte into
the DLCBDR and
Set TEOD
Once the last IFR byte to be transmitted is written to the DLCBDR, the
CPU then sets the TEOD bit in DLCBCR2. Once the TEOD bit is set,
after the last IFR byte written to the DLCBDR is transmitted onto the bus,
if the TMIFR1 bit has been set the BDLC will begin transmitting the CRC
byte, followed by an EOD. If the TMIFR0 bit has been set, the last IFR
byte will immediately be followed by the transmission of an EOD.
Following the EOD, and EOF will be recognized and the message will be
complete.
If at any time during the transmission of a Type 3 IFR a loss of arbitration
occurs, the TMIFR bit which is set and the TEOD bit (if set) will be
cleared, any IFR byte being transmitted will be discarded and the loss of
arbitration state will be reflected in the DLCBSVR. Likewise, if an error
is detected during the transmission of a Type 3 IFR the IFR control bits
will be cleared, the byte being transmitted will be discarded and the
DLCBSVR will reflect the detected error.
NOTE: If the Type 3 IFR being transmitted is made up of a single byte, the
appropriate TMIFR bit and the TEOD bit can be set at the same time.
The BDLC will then treat that byte as both the first and last IFR byte to
be sent.
Transmitting IFR
Exceptions
This basic IFR transmitting flow can be interrupted for the same reasons
as a normal message transmission. The IFR transmit process can be
adversely affected due to a loss of arbitration, an Invalid or Out of Range
Symbol, or due to a transmitter underrun caused by the CPU failing to
service a TDRE interrupt in a timely fashion. For a description of how
these exceptions can affect the IFR transmit process, refer to
Transmitting Exceptions.
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
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