Datasheet
Table Of Contents
- List of Sections
- Table of Contents
- General Description
- Central Processing Unit (CPU)
- Pinout and Signal Description
- System Configuration
- Registers
- Operating Modes
- Resource Mapping
- Bus Control and Input/Output
- Resets and Interrupts
- Voltage Regulator (VREG)
- Flash EEPROM 256K
- EEPROM 4K
- Port Integration Module
- Clocks and Reset Generator (CRG)
- Pulse Width Modulator (PWM)
- Enhanced Capture Timer (ECT)
- Serial Communications Interface (SCI)
- Serial Peripheral Interface (SPI)
- Inter-IC Bus (IIC)
- MSCAN
- Analog to Digital Converter
- Byte Data Link Controller Module
- Contents
- Overview
- Features
- Block Diagram
- Register Map
- Functional Description
- Register Descriptions
- External Pin Descriptions
- Reset Initialization/Basic Operation
- Transmitting A Message
- Receiving A Message
- Transmitting An In-Frame Response (IFR)
- Receiving An In-Frame Response (IFR)
- Special BDLC Operations
- Modes of Operation
- Interrupt Operation
- Low Power Options
- Background Debug Module (BDM)
- Breakpoint (BKP) Module
- Revision History
- Glossary
- Literature Updates

Byte Data Link Controller Module
Transmitting A Message
MC9S12DP256 — Revision 1.1
Byte Data Link Controller Module
network. For the transmit routine, either of these events can be dealt with
in a similar manner.
Loss of Arbitration If a loss of arbitration (LOA) occurs while the BDLC is transmitting onto
the SAE J1850 bus, the BDLC will immediately stop transmitting, and a
LOA status will be reflected in the DLCBSVR. If the loss of arbitration has
occurred on a byte boundary, an RDRF interrupt may also be pending
once the LOA interrupt is cleared.
When a loss of arbitration occurs, the J1850 message handling software
should immediately switch into the receive mode. If the TEOD bit was
set, it will be cleared automatically. If another attempt is to be made to
transmit the same message, the user must start the transmit
sequence over from the beginning of the message.
Error Detection Similar to a loss of arbitration, if any error (except a CRC error) is
detected on the SAE J1850 bus during a transmission, the BDLC will
stop transmitting immediately. The byte which was being transmitted will
be discarded, and the “Symbol Invalid or Out of Range” status will be
reflected in the DLCBSVR. As with the loss of arbitration, if the TEOD bit
was set, it will be cleared automatically, and any attempt to transmit the
same message will have to start from the beginning.
If a CRC error occurs following a transmission, this will also be reflected
in the DLCBSVR. However, since the CRC error is really a receive error
based on the received CRC byte, at this point all bytes of the message
will have been transmitted. It is therefore up to the user’s software to
determine if another attempt should be made to transmit the message in
which the error occurred.
Transmitter
Underrun
A transmitter underrun can occur when a TDRE interrupt is not serviced
in a timely fashion. If the last byte loaded into the DLCBDR is completely
transmitted onto the network before the next byte is loaded into the BDR,
a transmitter underrun will occur. If this does happen, the BDLC will
transmit two additional logic ones to ensure that the partial message
which was transmitted onto the bus does not end on a byte boundary.
This will be followed by an EOD and EOF symbol. The only indication to
the CPU that an underrun occurred is the Symbol Invalid or Out of Range
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
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