Datasheet

Byte Data Link
MC9S12DP256 — Revision 1.1
Byte Data Link Controller Module
short to ground would not allow the bus to be driven to the active
(dominant) state. The BDLC will wait for assertion of the receive pin for
(64 - analog round trip delay) t
bdlc
cycles, after assertion of the transmit
pin, before detecting the error. If the transmission is an IFR, the BDLC
will wait for (280 - analog round trip delay) t
bdlc
cycles before detecting
an error. The “analog round trip delay” is determined by the value stored
in the DLCBARD register. The BDLC will set the symbol invalid or out of
range flag (in DLCBSVR), abort that transmission and wait for the next
IP Bus command to transmit. In this case, the transmitter does not have
to wait for an EOF symbol to be received to be enabled. If the interrupt
enable bit (IE in DLCBCR1) is set, an interrupt request from the BDLC is
generated. Reading the DLCBSVR register will clear this flag.
In any case, if the bus fault is temporary, as soon as the fault is cleared,
the BDLC will resume normal operation. If the bus fault is permanent, it
may result in permanent loss of communication on the J1850 bus.
BREAK – Break Any BDLC transmitting at the time a BREAK is detected will treat the
BREAK as if a transmission error had occurred, and halt transmission.
If while receiving a message the BDLC detects a BREAK symbol, it will
treat the BREAK as a reception error.
If a BREAK symbol is received while the BDLC is transmitting or
receiving, the symbol invalid or out of range flag (in DLCBSVR) is set.
Further transmission/reception will be disabled until the J1850 bus
returns to the passive state and a valid EOF symbol is detected on the
J1850 bus.If the interrupt enable bit (IE in DLCBCR1) is set, an interrupt
request from the BDLC is generated. Reading the DLCBSVR register
will clear this flag.
The BDLC cannot transmit a BREAK symbol. It can only receive a
BREAK symbol from the J1850 bus.
Bus Error Summary The possible J1850 bus errors and the actions taken by the BDLC are
summarized in Table 114.
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