Datasheet

Byte Data Link Controller Module
Functional Description
MC9S12DP256 — Revision 1.1
Byte Data Link Controller Module
Symbol Error A symbol error is detected when an abnormal (invalid) symbol is
detected in a message being received from the J1850 bus. See sections
Invalid Passive Bit and Invalid Active Bit which define invalid
symbols.The symbol invalid or out of range flag (in DLCBSVR) is set
when a symbol error is detected. If the interrupt enable bit (IE in
DLCBCR1) is set, an interrupt request from the BDLC is generated.
Reading the DLCBSVR register will clear this flag.
Framing Error A framing error is detected when a received symbol occurs in an
inappropriate location in the message frame. The following situations
result in framing errors:
• An active logic “0” or logic “1” received as the first symbol of the
frame.
• An SOF symbol received in any location other than the first symbol
of a frame. Erroneous locations include: Within the data portion of
a message or IFR; Immediately following the EOD in a message
or IFR.
• An EOD symbol received on a non-byte boundary in a message
or IFR.
• An active logic “0” or logic “1” received immediately following the
EOD at the end of an IFR.
The symbol invalid or out of range flag (in DLCBSVR) is set when a
framing error is detected. If the interrupt enable bit (IE in DLCBCR1) is
set, an interrupt request from the BDLC is generated. Reading the
DLCBSVR register will clear this flag.
Bus Fault If a bus fault occurs, the response of the BDLC will depend upon the type
of bus fault.
If the bus is shorted to
V
DD
, the BDLC will wait for the bus to fall to a
passive state before it will attempt to transmit a message. As long as the
short remains, the BDLC will never attempt to transmit a message onto
the J1850 bus.
If the bus is shorted to ground, the BDLC will see an idle bus, begin to
transmit the message, and then detect a transmission error, since the
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