Datasheet

Byte Data Link Controller Module
Block Diagram
MC9S12DP256 — Revision 1.1
Byte Data Link Controller Module
Block Diagram
Figure 114 BDLC Block Diagram
Figure 107 shows the organization of the BDLC module. The IP Bus
Interface provides the link between the IP Bus and the Buffers. The
Buffers provide storage for data received and data to be transmitted onto
the J1850 bus. The Protocol Handler is responsible for the encoding and
decoding of data bits and special message symbols during transmission
and reception. The MUX Interface provides the link between the BDLC
digital section and the analog Physical Interface. The wave shaping,
driving and digitizing of data is performed by the Physical Interface.
NOTE: The Physical Interface is not implemented in the BDLC and must be
provided externally.
The main functional blocks of the BDLC are explained in greater detail
in the following sections.
Use of the BDLC module in message networking fully implements the
“SAE Standard J1850 Class B Data Communication Network Interface”
specification.
To IP Bus
Protocol Handler
MUX Interface
IP Bus Interface
Rx/Tx
Buffers
Physical Interface
To J1850 Bus
BDLC
Port Integration Module
BDLC Core
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...