Datasheet

Analog to Digital Converter
External Pin Descriptions
MC9S12DP256 — Revision 1.1
Analog to Digital Converter
External Pin Descriptions
The basic ATD requires a total of 12 pins to implement the 8 input
channel A/D converter. The pins fall into four categories: channel input
pins (one of the channel input pins is muxed with the ETRIG input),
reference potential pins (VRL and VRH), and analog supply potential
pins (VDDA and VSSA). These pins are described below.
Channel Pins The 8 channel pins serve three purposes.
First, the channel pins are used as the analog input pins of the ATD.
Each pin is connected to an analog switch which serves as the signal
gate into the sample submodule.
Second, the channel pins can also be used to collect general purpose
digital input data. The digital data must meet the V
IH
and V
IL
specifications. The channel pins are also connected to the input of a
Schmitt Trigger which drives the digital data to the Port Data Register
(PORTAD1). The Schmitt Trigger is disabled when the respective
ATDDIEN bit is set to “0”. The digital input data is accessed via the
PORTAD1 Registers. Since the port PORTAD1 pins are used only as
inputs in normal operating modes, no data direction register is necessary
for this port.
Third, channel 7 pin is used to provide the external trigger signal to the
module. The ATDDIEN bit 7 must be set to enable schmitt trigger input
buffer.
External Trigger
Input Pin (ETRIG)
As a module variability, the ETRIG pin may occupy a separate pin, or the
channel 7 pin may be used to provide the external trigger input signal
when the external trigger mode is enabled.External trigger mode is
enabled using the control bits in the ATDCTL2 register. Triggering is
synchronized to the ATD module clock; when a active falling or rising
edge on the trigger signal or the correct level is detected, a new
conversion cycle begins.
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
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