Datasheet

Analog to Digital Converter
Register Descriptions
MC9S12DP256 — Revision 1.1
Analog to Digital Converter
ATD Input Enable
Mask Register
(ATDDIEN)
This register is added for controlling the PORTAD1. Each bit
individually enables the corresponding digital input buffers of
PORTAD1
1 = Enable digital input buffer
0 = Disable digital input buffer
This enable register confers the user greater control over the use of
the ports. Note that when ATDDIEN enable bit is set, it will enable the
input buffers continuously. The user is advised that if this bit is set
while simultaneously using it as an analog port, the input buffer
maybe in the linear region and therefore it may consume excessive
power.
If the ATDDIEN bit is clear, a port read will return a “1”.
If the buffers are enabled during conversion, it will burn more power. The
recommendation is to have buffers disabled during conversion. Due to
internal synchronization circuits it can take up yo 2 bus cycles until the
correct value is read on the PORTAD1 register.
Address Offset: $000D
Bit 7 654321Bit 0
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset: 00000000
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Freescale Semiconductor, Inc.
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