Datasheet

Analog to Digital Converter
Register Descriptions
MC9S12DP256 — Revision 1.1
Analog to Digital Converter
ETORF — External Trigger Overrun Flag
While in edge trigger mode, if additional active edges are detected
while a conversion sequence is in process the overrun flag is set.
1 = External trigger overrun error has occurred
0 = No External trigger overrun error has occurred
FIFOR — FIFO Over Run Flag.
1 = An over run condition exists
0 = No over run has occurred
This bit indicates that a result register has been written to before its
associated conversion complete flag (CCF) has been cleared. This
flag is most useful when using the FIFO mode because the flag
potentially indicates that result registers are out of sync with the input
channels. However, it is also practical for non-FIFO modes, and
indicates that a result register has been over written before it has
been read (i.e. the old data has been lost).
CC2/CC1/CC0 — Conversion Counter
This 3-bit value represents the contents of the result register counter;
the result register counter points to the result register that will receive
the result of the current conversion. If not in FIFO mode, the register
counter is initialized to zero when a new conversion sequence is
begun. If in FIFO mode, the register counter is not initialized. The
result register count wraps around when its maximum value is
reached.
CCF7 through CCF0 — Conversion Complete Flags
A conversion complete flag is set at the end of each conversion in a
conversion sequence. The flags are associated with the conversion
position in a sequence (and also the result register number).
Therefore, CCF0 is set when the first conversion in a sequence is
complete and the result is available in result register ATDDR0; CCF1
is set when the second conversion in a sequence is complete and the
result is available in ATDDR1, and so forth.
The conversion complete flags are cleared depending on the setting
of the fast flag clear bit (AFFC in ATDCTL2). When AFFC=0, the
status register containing the conversion complete flag must be read
as a precondition before the flag can be cleared. The flag is actually
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...