Datasheet

Analog to Digital Converter
Functional Description
MC9S12DP256 — Revision 1.1
Analog to Digital Converter
The external trigger input is enabled by the ETRIGE, ETRIGP, ETRIGLE
control bits in ATDCTL2. When ETRIGE is first enabled, a conversion
sequence is initiated by an external event transitioning the ETRIG pin.
Once ETRIGE is enabled, conversions cannot be started by a write to
ATDCTL5, but rather must be triggered externally.
External trigger mode operates with the other operating modes to
produce a variety of external triggered modes. For example, by selecting
a conversion sequence length of one, the ATD module can be made to
perform a single conversion per active edge of the external trigger.
Since, interrupts can be generated by the end of the sequence, this
mode will signal the MCU after single external events. By selecting a
larger conversion sequence length, an entire sequence of conversions
can be performed on one external trigger event.
If the level mode is active and the external trigger both de-asserts and
re-asserts itself during a conversion sequence, this does not constitute
an overrun. Therefore, the flag is not set. If the trigger is left asserted in
level mode while a sequence is completing, another sequence will be
triggered immediately. If the level sensitive mode is selected and ETRIG
input is held active, subsequent conversion sequences occur after the
sequence complete flag is set.
General Purpose
Digital Input Port
Operation
The input channel pins can be multiplexed between analog and digital
data. As analog inputs, they are multiplexed and sampled to supply
signals to the A/D converter. As digital inputs, they supply external input
data that can be accessed through the digital port registers.
The analog/digital multiplex operation is performed in the input pads.
The input pad is always connected to the analog inputs of the ATD
module. The input pad signal is buffered before the data is bussed to the
digital port registers. The buffer is a schmitt trigger nand so that the
buffer can be turned off; this is important so that the buffer does not draw
excess current when analog potentials are presented at its input. This is
particularly important when some of the inputs are being used as digital
inputs and some as analog inputs. To minimize excess current draw, the
buffer is enabled only if the respective ATDDIEN bit is set. If this bit is
not set a digital read will always return a “1”. Analog signals present on
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