Datasheet

Analog to Digital Converter
Functional Description
MC9S12DP256 — Revision 1.1
Analog to Digital Converter
reference potentials to set the sampled signal level within itself without
relying on the sample machine to deliver them.
Mode Control organizes the conversion sequences, specifies the input
sample channel, implements the external trigger mode, and move digital
output data from the SAR to the result registers. One important task is to
control register file read/write timing to avoid conflicts between IP bus
accesses and ATD module updates to the same register at the same
time.
The result registers consists of two port latches. The SAR writes data
into the register through one port; the module data bus reads data out of
the registers through the other port.
External Trigger
Input (ETRIG)
The external trigger feature allows the user to synchronize ATD
conversions to the external environment events rather than relying on
software to signal the ATD module when ATD conversions are to take
place. The input signal is programmable to be edge or level sensitive
with polarity control. If level sensitivity is selected the atd_etrig input
signal is treated like a trigger gate.
In edge trigger mode the
active edge of the external trigger signal is
used to signal the ATD module when to begin sampling the input.
A summary of the external trigger function is shown in Table 96. This
table gives a brief description of the different combinations of control bits
and their affect on the external trigger function.
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
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