Datasheet

Table Of Contents
Analog to Digital Converter
MC9S12DP256 — Revision 1.1
Analog to Digital Converter
Functional Block
Diagram
The block diagram in Figure 108illustrates the functional structure of the
A/D module. The functionality is divided into three submodules as
denoted by the dashed lines on the figure. These are the IP Bus
Interface, the Conversion Mode Control/Register File, and the Custom
Analog.
The IP Bus Interface connects the module to the bus. The objective was
to design an ATD module with a generic I/O requirements; this would
connect to a particular bus with a specific bus interface. The bus
interface contains a clock generation block which clocks the rest of the
module. This groups the module’s clocking requirements into one block.
The Conversion Mode Control/Register File defines the HC12
programmers environment for the ATD module. All of the control, status,
test, and result registers are located in this submodule. The mechanics
that control the various operating modes and scans for the module are
implemented here.
The Custom Analog performs analog to digital conversions. It accepts
signals from the conversion control machine and the sample machine.
This sub-module contains all analog and digital electronics required to
perform a single conversion.
A more complete description of each sub-module is provided in the
Functional Description section of the specification.
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
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