Datasheet
Table Of Contents
- List of Sections
- Table of Contents
- General Description
- Central Processing Unit (CPU)
- Pinout and Signal Description
- System Configuration
- Registers
- Operating Modes
- Resource Mapping
- Bus Control and Input/Output
- Resets and Interrupts
- Voltage Regulator (VREG)
- Flash EEPROM 256K
- EEPROM 4K
- Port Integration Module
- Clocks and Reset Generator (CRG)
- Pulse Width Modulator (PWM)
- Enhanced Capture Timer (ECT)
- Serial Communications Interface (SCI)
- Serial Peripheral Interface (SPI)
- Inter-IC Bus (IIC)
- MSCAN
- Analog to Digital Converter
- Byte Data Link Controller Module
- Contents
- Overview
- Features
- Block Diagram
- Register Map
- Functional Description
- Register Descriptions
- External Pin Descriptions
- Reset Initialization/Basic Operation
- Transmitting A Message
- Receiving A Message
- Transmitting An In-Frame Response (IFR)
- Receiving An In-Frame Response (IFR)
- Special BDLC Operations
- Modes of Operation
- Interrupt Operation
- Low Power Options
- Background Debug Module (BDM)
- Breakpoint (BKP) Module
- Revision History
- Glossary
- Literature Updates

MSCAN
MC9S12DP256 — Revision 1.1
MSCAN
Interrupt
Acknowledge
Interrupts are directly associated with one or more status flags in either
the MSCAN Receiver Flag Register (CANRFLG) or the MSCAN
Transmitter Flag Register (CANTFLG). Interrupts are pending as long as
one of the corresponding flags is set. The flags in the above registers
must be reset within the interrupt handler to handshake the interrupt.
The flags are reset by writing a ‘1’ to the corresponding bit position. A
flag cannot be cleared if the respective condition still prevails.
CAUTION:
It must be guaranteed that the CPU only clears the bit causing the
current interrupt. For this reason, bit manipulation instructions (BSET)
must not be used to clear interrupt flags. These instructions may cause
accidental clearing of interrupt flags which are set after entering the
current interrupt service routine.
Interrupt Sources The MSCAN supports four interrupt functions as shown in Table 95.
NOTE:
The vector addresses and the relative interrupt priority are determined
at the MCU level.
Recovery from
STOP or WAIT
The MSCAN can recover from STOP or WAIT via the wake-up interrupt.
This interrupt can only occur if the MSCAN is in sleep mode (SLPRQ=1
and SLPAK=1), the wake-up option is enabled (WUPE=1) and the
wake-up interrupt is enabled (WUPIE=1).
Table 95 MSCAN Interrupt Sources
Interrupt Function Interrupt Flag
Local
Enable
Global
(CCR)
Mask
Wake-Up WUPIF WUPIE
I Bit
Error
Interrupts
CSCIF CSCIE
OVRIF OVRIE
Receive RXF RXFIE
Transmit
TXE0 TXEIE0
TXE1 TXEIE1
TXE2 TXEIE2
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
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