Datasheet

MSCAN
Low Power Options
MC9S12DP256 — Revision 1.1
MSCAN
the MSCAN into Sleep Mode (SLPRQ=1 and SLPAK=1) before setting
the INITRQ bit in the CANCTL0 register. Otherwise the abort of an
ongoing message can cause an error condition and can have an impact
on the other bus devices.
In Initialization Mode, the MSCAN is stopped. However, interface
registers can still be accessed. This mode is used to reset the
CANTCTL0, CANRFLG, CANRIER, CANTFLG, CANTIER, CANTARQ,
CANTAAK, CANTBSEL registers to their default values. In addition it
enables the configuration of the CANBTR0, CANBTR1 bit timing
registers, CANIDAC and the CANIDAR, CANIDMR message filters. See
MSCAN Control 0 Register (CANCTL0) for a detailed description of the
Initialization Mode.
Figure 107 Initialization Request/Acknowledge Cycle
Due to independent clock domains within the MSCAN the INITRQ has
to be synchronized to all domains by using a special handshake
mechanism. This handshake causes additional synchronisation delay
(see Initialization Request/Acknowledge Cycle). If there is no message
transfer ongoing on the CAN bus, the minimum delay will be two
additional bus clocks and three additional CAN clocks. When all parts of
the MSCAN are in Initialization Mode the INITAK flag is set. The
application software must use INITAK as a handshake indication for the
request (INITRQ) to go into Initialization Mode.
NOTE: The MCU cannot clear the INITRQ bit before Initialization Mode
(INITRQ=1 and INITAK=1) is active.
SYNC
SYNC
CPU Clock Domain
CAN Clock Domain
CPU
Init Request
INIT
Flag
INITAK
Flag
INITRQ
sync.
INITAK
sync.
INITRQ
INITAK
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
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