Datasheet

MSCAN
MC9S12DP256 — Revision 1.1
MSCAN
Read: anytime for transmit buffers; only when RXF flag is set for receive
buffers (see MSCAN Receiver Flag Register (CANRFLG)).
Write: anytime for transmit buffers when TXEx flag is set (see MSCAN
Transmitter Flag Register (CANTFLG)) and the corresponding transmit
buffer is selected in CANTBSEL (see MSCAN Transmit Buffer Selection
(CANTBSEL)); unimplemented for receive buffers
Reset: $xx because of RAM based implementation
Identifier Registers
(IDR0–3)
The identifier registers for an extended format identifier consist of a total
of 32 bits; ID28–ID0, SRR, IDE, and RTR bits. The identifier registers for
a standard format identifier consist of a total of 13 bits; ID10–ID0, RTR,
and IDE bits.
ID28–ID0 — Extended format identifier
The identifiers consist of 29 bits (ID28–ID0) for the extended format.
ID28 is the most significant bit and is transmitted first on the bus
during the arbitration procedure. The priority of an identifier is defined
to be highest for the smallest binary number.
ID10–ID0 — Standard format identifier
The identifiers consist of 11 bits (ID10–ID0) for the standard format.
ID10 is the most significant bit and is transmitted first on the bus
during the arbitration procedure. The priority of an identifier is defined
to be highest for the smallest binary number.
Register name Bit 7 654321Bit 0 ADDR
IDR0
Read:
ID10 ID9 ID8 ID7 ID6 ID5 ID4 ID3 $00x0
Write:
IDR1
Read:
ID2 ID1 ID0 RTR IDE (=0) $00x1
Write:
IDR2
Read:
$00x2
Write:
IDR3
Read:
$00x3
Write:
= Unused
Figure 104 Standard Identifier Mapping
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
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