Datasheet
Table Of Contents
- List of Sections
- Table of Contents
- General Description
- Central Processing Unit (CPU)
- Pinout and Signal Description
- System Configuration
- Registers
- Operating Modes
- Resource Mapping
- Bus Control and Input/Output
- Resets and Interrupts
- Voltage Regulator (VREG)
- Flash EEPROM 256K
- EEPROM 4K
- Port Integration Module
- Clocks and Reset Generator (CRG)
- Pulse Width Modulator (PWM)
- Enhanced Capture Timer (ECT)
- Serial Communications Interface (SCI)
- Serial Peripheral Interface (SPI)
- Inter-IC Bus (IIC)
- MSCAN
- Analog to Digital Converter
- Byte Data Link Controller Module
- Contents
- Overview
- Features
- Block Diagram
- Register Map
- Functional Description
- Register Descriptions
- External Pin Descriptions
- Reset Initialization/Basic Operation
- Transmitting A Message
- Receiving A Message
- Transmitting An In-Frame Response (IFR)
- Receiving An In-Frame Response (IFR)
- Special BDLC Operations
- Modes of Operation
- Interrupt Operation
- Low Power Options
- Background Debug Module (BDM)
- Breakpoint (BKP) Module
- Revision History
- Glossary
- Literature Updates

MSCAN
Register Descriptions
MC9S12DP256 — Revision 1.1
MSCAN
MSCAN Transmit
Buffer Selection
(CANTBSEL)
The CANTBSEL register allows the selection of the actual transmit
message buffer, which will be then accessible in the CANTXFG register
space (see Programmer’s Model of Control Registers).
NOTE:
The CANTBSEL register is held in the reset state when the Initialization
Mode is active (INITRQ=1 and INITAK=1). This register is writable again
as soon as the Initialization Mode is left (INITRQ=0 and INITAK=0).
Read: find the lowest ordered bit set to ‘1’, all other bits will be read as ‘0’
Write: anytime when not in Initialization Mode
Tx2–TX0 — Transmit Buffer Select
The lowest numbered bit places the respective transmit buffer in the
CANTXFG register space (e.g. TX1=1 and TX0=1 selects transmit
buffer TX0, TX1=1 and TX0=0 selects transmit buffer TX1)
1 = The associated message Buffer is selected, if lowest numbered
bit.
0 = The associated message buffer is deselected
NOTE:
The following gives a short programming example of the usage of the
CANTBSEL register:
The application software wants to get the next available transmit buffer.
It reads the CANTFLG register and writes this value back into the
CANTBSEL register. In this example Tx buffers TX1 and TX2 are
available. The value read from CANTFLG is therefore 8’b0000_0110.
When writing this value back to CANTBSEL the Tx buffer TX1 is
selected in the CANTXFG because the lowest numbered bit set to ‘1’ is
at bit position 1. Reading back this value out of CANTBSEL results in
8’b0000_0010, because only the lowest numbered bit position set to ‘1’
is prsented. This mechanism eases the application software the
selection of the next available Tx buffer.
Address Offset: $000A
Bit 7 654321Bit 0
Read: 00000
TX2 TX1 TX0
Write:
Reset: 00000000
= Unimplemented
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
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