Datasheet

MSCAN
Register Descriptions
MC9S12DP256 — Revision 1.1
MSCAN
Read: anytime
Write: anytime when out of Initialization Mode
WUPIE — Wake-up Interrupt Enable
1 = A wake-up event causes a wake-up interrupt request.
0 = No interrupt request is generated from this event.
NOTE: The CPU has to make sure that the Wake-up interrupt register and the
WUPE register (see MSCAN Control 0 Register (CANCTL0)) is enabled,
if the recovery mechanism from STOP or WAIT is required.
CSCIE — CAN Status Change Interrupt Enable
1 = A CAN Status Change event causes an error interrupt request.
0 = No interrupt request is generated from this event.
RSTATE1, RSTATE0— Receiver Status Change Enable
These RSTAT enable bits control the sensitivity level in which
receiver state changes are causing CSCIF interrupts. Independent of
the chosen sensitivity level the RSTAT flags still indicate the actual
receiver state and are only updated if no CSCIF interrupt is pending.
11 = generate CSCIF interrupt on all state changes
10 = generate CSCIF interrupt only if the receiver enters or leaves
‘RxErr’ or ‘BusOff’
1
state. Discard other receiver state changes
for generating CSCIF interrupt.
01 = generate CSCIF interrupt only if the receiver enters or leaves
‘BusOff’ state. Discard other receiver state changes for
generating CSCIF interrupt.
00 = do not generate any CSCIF interrupt caused by receiver state
changes.
1. BusOff state is only defined by the CAN standard for transmitters. Because the only possible
state change for the transmitter from BusOff to TxOK also forces the receiver to skip its current
state to RxOK, the coding of the RXSTAT[1:0] flags define an additional BusOff state for the re-
ceiver (see MSCAN Receiver Flag Register (CANRFLG))
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
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