Datasheet

MSCAN
Register Descriptions
MC9S12DP256 — Revision 1.1
MSCAN
TSEG13–TSEG10 — Time Segment 1
Time segments within the bit time fix the number of clock cycles per
bit time and the location of the sample point (see Figure 100).
Time segment 1 (TSEG1) values are programmable as shown in
Table 90.
The bit time is determined by the oscillator frequency, the baud rate
prescaler, and the number of time quanta (Tq) clock cycles per bit (as
shown in Table 89 and Table 90 above).
Table 89 Time Segment 2 Values
TSEG22 TSEG21 TSEG20 Time segment 2
000
1 Tq clock cycle
(1)
1. This setting is not valid. Please refer to Figure 101 for valid settings.
0 0 1 2 Tq clock cycles
. . . .
1 1 0 7 Tq clock cycles
1 1 1 8 Tq clock cycles
Table 90 Time Segment 1 Values
TSEG13 TSEG12 TSEG11 TSEG10 Time segment 1
0000
1 Tq clock cycle
(1)
1. This setting is not valid. Please refer to Figure 101 for valid settings.
0001
2 Tq clock cycles
1
0010
3 Tq clock cycles
1
00114 Tq clock cycles
. . . . .
111015 Tq clock cycles
111116 Tq clock cycles
Bit Time
Prescaler value◊()
f
CANCLK
--------------------------------------------------
number of Time Quanta◊◊ ◊()•=◊
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