Datasheet

MSCAN
MC9S12DP256 — Revision 1.1
MSCAN
MSCAN Bus Timing
Register 1
(CANBTR1)
The CANBTR1 register provides for various bus timing control of the
MSCAN module as described below.
Read: anytime
Write: anytime in Initialization Mode (INITRQ=1 and INITAK=1)
SAMP — Sampling
This bit determines the number of samples of the serial bus to be
taken per bit time. If set, three samples per bit are taken; the regular
one (sample point) and two preceding samples using a majority rule.
For higher bit rates, it is recommended that SAMP be cleared which
means that only one sample is taken per bit.
1 = Three samples per bit
1
.
0 = One sample per bit.
TSEG22–TSEG20 — Time Segment 2
Time segments within the bit time fix the number of clock cycles per
bit time and the location of the sample point (see Figure 100).
Time segment 2 (TSEG2) values are programmable as shown in
Table 89.
Address Offset: $0003
Bit 7 654321Bit 0
Read:
SAMP TSEG22 TSEG21 TSEG20 TSEG13 TSEG12 TSEG11 TSEG10
Write:
Reset: 00000000
1. In this case, PHASE_SEG1 must be at least 2 Time Quanta.
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
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