Datasheet
Table Of Contents
- List of Sections
- Table of Contents
- General Description
- Central Processing Unit (CPU)
- Pinout and Signal Description
- System Configuration
- Registers
- Operating Modes
- Resource Mapping
- Bus Control and Input/Output
- Resets and Interrupts
- Voltage Regulator (VREG)
- Flash EEPROM 256K
- EEPROM 4K
- Port Integration Module
- Clocks and Reset Generator (CRG)
- Pulse Width Modulator (PWM)
- Enhanced Capture Timer (ECT)
- Serial Communications Interface (SCI)
- Serial Peripheral Interface (SPI)
- Inter-IC Bus (IIC)
- MSCAN
- Analog to Digital Converter
- Byte Data Link Controller Module
- Contents
- Overview
- Features
- Block Diagram
- Register Map
- Functional Description
- Register Descriptions
- External Pin Descriptions
- Reset Initialization/Basic Operation
- Transmitting A Message
- Receiving A Message
- Transmitting An In-Frame Response (IFR)
- Receiving An In-Frame Response (IFR)
- Special BDLC Operations
- Modes of Operation
- Interrupt Operation
- Low Power Options
- Background Debug Module (BDM)
- Breakpoint (BKP) Module
- Revision History
- Glossary
- Literature Updates

MSCAN
MC9S12DP256 — Revision 1.1
MSCAN
INITRQ=1 and INITAK=1. Depending on the setting of the WUPE bit
the MSCAN will clear the flag if it detects bus activity on CAN while in
Sleep Mode.
1 = Sleep Mode Active – The MSCAN has entered Sleep Mode.
0 = Running – The MSCAN operates normally.
INITAK — Initialization Mode Acknowledge
This flag indicates whether the MSCAN module is in Initialization
Mode (see MSCAN Initialization Mode). It is used as a handshake flag
for the INITRQ Initialization Mode request. Initialization Mode is active
when INITRQ=1 and INITAK=1.
The registers CANCTL1, CANBTR0, CANBTR1, CANIDAC,
CANIDAR0–7, CANIDMR0–7 can only be written by the CPU when
the MSCAN is in Initialization Mode.
1 = Initialization Mode Active – The MSCAN has entered
Initialization Mode.
0 = Running – The MSCAN operates normally.
MSCAN Bus Timing
Register 0
(CANBTR0)
The CANBTR0 register provides for various bus timing control of the
MSCAN module as described below.
Read: anytime
Write: anytime in Initialization Mode (INITRQ=1 and INITAK=1)
SJW1, SJW0 — Synchronization Jump Width
The synchronization jump width defines the maximum number of time
quanta (Tq) clock cycles a bit can be shortened or lengthened to
achieve resynchronization to data transitions on the bus (see
Table 87).
Address Offset: $0002
Bit 7 654321Bit 0
Read:
SJW1 SJW0 BRP5 BRP4 BRP3 BRP2 BRP1 BRP0
Write:
Reset: 00000000
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
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