Datasheet

Table Of Contents
MSCAN
Register Descriptions
MC9S12DP256 — Revision 1.1
MSCAN
Read: anytime
Write: anytime when out of initialization; exceptions are bits RXACT and
SYNCH which are read-only and bit RXFRM which is set by the module.
A write of ‘1’ to the RXFRM register clears the flag and a write of ‘0’ is
ignored
RXFRM — Received Frame Flag
This bit is read and clear only. It is set when a receiver has received
a valid message correctly, independently of the filter configuration.
Once set, it remains set until cleared by software or reset. Clearing is
done by writing a ‘1’ to the bit. This bit is not valid in loop back mode.
1 = A valid message was received since last clearing of this flag
0 = No valid message was received since last clearing this flag.
NOTE:
The MSCAN must be in run mode for this bit to become set.
RXACT — Receiver Active Status
This flag indicates the MSCAN is receiving a message. The flag is
controlled by the receiver front end. This bit is not valid in loop back
mode.
1 = MSCAN is receiving a message (including when arbitration is
lost)
1
0 = MSCAN is transmitting or idle
1
.
CSWAI — CAN Stops in Wait Mode
Enabling this bit allows for lower power consumption in Wait Mode by
disabling all the clocks at the bus interface to the MSCAN module.
1 = The module ceases to be clocked during WAIT mode.
0 = The module is not affected during WAIT mode.
CAUTION:
In order to protect from accidentally violating the CAN protocol the
TxCAN pin is immediately forced to a recessive state when the MCU
enters Wait (CSWAI=1) or Stop Mode (see MSCAN Power Down Mode)
1. See the Bosch CAN 2.0A/B protocol specification dated September 1991 for a detailed defi-
nition of transmitter and receiver states.
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
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