Datasheet
Table Of Contents
- List of Sections
- Table of Contents
- General Description
- Central Processing Unit (CPU)
- Pinout and Signal Description
- System Configuration
- Registers
- Operating Modes
- Resource Mapping
- Bus Control and Input/Output
- Resets and Interrupts
- Voltage Regulator (VREG)
- Flash EEPROM 256K
- EEPROM 4K
- Port Integration Module
- Clocks and Reset Generator (CRG)
- Pulse Width Modulator (PWM)
- Enhanced Capture Timer (ECT)
- Serial Communications Interface (SCI)
- Serial Peripheral Interface (SPI)
- Inter-IC Bus (IIC)
- MSCAN
- Analog to Digital Converter
- Byte Data Link Controller Module
- Contents
- Overview
- Features
- Block Diagram
- Register Map
- Functional Description
- Register Descriptions
- External Pin Descriptions
- Reset Initialization/Basic Operation
- Transmitting A Message
- Receiving A Message
- Transmitting An In-Frame Response (IFR)
- Receiving An In-Frame Response (IFR)
- Special BDLC Operations
- Modes of Operation
- Interrupt Operation
- Low Power Options
- Background Debug Module (BDM)
- Breakpoint (BKP) Module
- Revision History
- Glossary
- Literature Updates

MSCAN
MC9S12DP256 — Revision 1.1
MSCAN
MSCAN utilizes an advanced buffer arrangement resulting in a
predictable real-time behavior and simplifies the application software.
Features
The basic features of the MSCAN are as follows:
• Modular architecture
• Implementation of the CAN protocol – Version 2.0A/B
– Standard and extended data frames
– 0–8 bytes data length
– Programmable bit rate up to 1 Mbps
1
– Support for remote frames
• 4 receive buffers with FIFO storage scheme
• 3 transmit buffers with internal prioritization using a ‘local priority’
concept
• Flexible maskable identifier filter supports two full size extended
identifier filters (two 32-bit) or four 16-bit filters or eight 8-bit filters
• Programmable wake-up functionality with integrated low-pass
filter
• Programmable loop back mode supports self-test operation
• Programmable listen-only mode for monitoring of CAN bus
• Separate signalling and interrupt capabilities for all CAN receiver
and transmitter error states (Warning, Error Passive, Bus-Off)
• Programmable MSCAN clock source either system clock or
crystal oscillator output
• Internal timer for time-stamping of received and transmitted
messages
• Three low power modes: Sleep, Power Down and MSCAN Enable
1. Depending on the actual bit timing and the clock jitter of the PLL.
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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