Datasheet

Serial Peripheral Interface (SPI)
MC9S12DP256 — Revision 1.1
Serial Peripheral Interface (SPI)
The direction of each serial I/O pin depends on the BIDIROE bit. If the
pin is configured as an output, serial data from the shift register is driven
out on the pin. The same pin is also the serial input to the shift register.
The SCK is output for the master mode and input for the slave mode.
The SS is the input or output for the master mode, and it is always the
input for the slave mode.
The bidirectional mode does not affect SCK and SS functions.
Error Conditions The SPI has one error condition
• Mode fault error
Mode Fault Error If the SS
input becomes low while the SPI is configured as a master, it
indicates a system error where more than one master may be trying to
drive the MOSI and SCK lines simultaneously. This condition is not
permitted in normal operation; the MODF bit in the SPI status register is
set automatically provided the MODFEN bit is set.
Table 79 Normal Mode and Bidirectional Mode
When SPE = 1 Master Mode MSTR = 1 Slave Mode MSTR = 0
Normal Mode
SPC0 = 0
Bidirectional Mode
SPC0 = 1
SPI
MOSI
MISO
BIDIROE & MSTR
Serial Out
Serial In
SPI
MOSI
MISO
Serial In
Serial Out
BIDIROE & MSTR
SPI
MOMI
SPI port
BIDIROE & MSTR
Serial Out
Serial In
pin 0
SPI
SISO
BIDIROE & MSTR
Serial In
Serial Out
SPI port
pin 1
.
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
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