Datasheet

Serial Peripheral Interface (SPI)
MC9S12DP256 — Revision 1.1
Serial Peripheral Interface (SPI)
Module Memory Map
The memory map for the Serial Peripheral Interface is given below in
Table 75. The address listed for each register is the sum of a base
address and an address offset. The base address is defined at the SoC
level and the address offset is defined at the module level. Reads from
reserved addresses ($0006 through $0007 and $0004) return zeros and
writes to reserved addresses have no effect.
Table 75 Module Memory Map
Address Use Access
$0000 SPI Control Register 1 Read / Write
$0001 SPI Control Register 2
Read / Write
(1)
1. Certain bits are non-writable.
$0002 SPI Baud Rate Register
Read / Write
(1)
$0003 SPI Status Register
Read
(2)
2. Writes to this register are ignored.
$0004 Reserved
---
(2) (3)
3. Reading from this register returns all zeros.
$0005 SPI Data Register Read / Write
$0006 Reserved
---
(2) (3)
$0007 Reserved
---
(2) (3)
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