Datasheet
Table Of Contents
- List of Sections
- Table of Contents
- General Description
- Central Processing Unit (CPU)
- Pinout and Signal Description
- System Configuration
- Registers
- Operating Modes
- Resource Mapping
- Bus Control and Input/Output
- Resets and Interrupts
- Voltage Regulator (VREG)
- Flash EEPROM 256K
- EEPROM 4K
- Port Integration Module
- Clocks and Reset Generator (CRG)
- Pulse Width Modulator (PWM)
- Enhanced Capture Timer (ECT)
- Serial Communications Interface (SCI)
- Serial Peripheral Interface (SPI)
- Inter-IC Bus (IIC)
- MSCAN
- Analog to Digital Converter
- Byte Data Link Controller Module
- Contents
- Overview
- Features
- Block Diagram
- Register Map
- Functional Description
- Register Descriptions
- External Pin Descriptions
- Reset Initialization/Basic Operation
- Transmitting A Message
- Receiving A Message
- Transmitting An In-Frame Response (IFR)
- Receiving An In-Frame Response (IFR)
- Special BDLC Operations
- Modes of Operation
- Interrupt Operation
- Low Power Options
- Background Debug Module (BDM)
- Breakpoint (BKP) Module
- Revision History
- Glossary
- Literature Updates

Serial Peripheral Interface (SPI)
Signal Descriptions
MC9S12DP256 — Revision 1.1
Serial Peripheral Interface (SPI)
Basically four signals are used in the following configuration (Refer to
Figure 80) to generate each of the ports MISO, MOSI, SCK and SS
.
Figure 80 SPI External Interface
Pad Input Signals
Slave Data in
(spi_mosi_ind)
This is one of the two SPI module pins that transmit serial data. This pin
is accepted as an input by the SPI when the SPI is configured as a slave.
Master Data in
(spi_miso_ind)
This is one of the two SPI module pins that transmit serial data. This pin
is accepted as an input by the SPI when the SPI is configured as a
master.
Slave Select in
(spi_ss_ind)
This pin is used to indicate that the SPI module has been selected for
data transfer. This pin is always accepted as an input by the SPI when
the SPI is configured as a slave.
Serial Clock in
(spi_sck_ind)
This pin is used as the clock with respect to which the data is accepted.
Pad Control
Signals
Mosi port enable
(mosi_port_en)
This pin indicates that the SPI is the master of the MOSI pad.
ss_do
ss_obe
ss_ind
SS
SPI
BLOCK
PAD
ss_port_en
GPI/O
0
1
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
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