Datasheet

Serial Communications Interface (SCI)
Functional Description
MC9S12DP256 — Revision 1.1
Serial Communications Interface (SCI)
The logic 1 msb of an address frame clears the receiver’s RWU bit
before the stop bit is received and sets the RDRF flag.
Address mark wakeup allows messages to contain idle characters but
requires that the msb be reserved for use in address frames.
NOTE: With the WAKE bit clear, setting the RWU bit after the sci_rx_ind signal
has been idle can cause the receiver to wake up immediately.
Single-Wire
Operation
Normally, the SCI uses two pins for transmitting and receiving. In
single-wire operation, the RXD pin is disconnected from the SCI. The
SCI uses the TXD pin for both receiving and transmitting.
Figure 77 Single-Wire Operation (LOOPS = 1, RSRC = 1)
Enable single-wire operation by setting the LOOPS bit and the receiver
source bit, RSRC, in SCI control register 1 (SCICR1). Setting the
LOOPS bit disables the path from the sci_rx_ind signal to the receiver.
Setting the RSRC bit connects the receiver input to the output of the TXD
pin driver. Both the transmitter and receiver must be enabled (TE=1 and
RE=1).The TXDIR bit (SCISR2[1]) determines whether the TXD pin is
going to be used as an input (TXDIR = 0) or an output (TXDIR = 1) in this
mode of operation.
Loop Operation In loop operation the transmitter output goes to the receiver input. The
sci_rx_ind signal is disconnected from the SCI.
RXD
TRANSMITTER
RECEIVER
sci_tx_do
sci_tx_ind
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
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