Datasheet
Table Of Contents
- List of Sections
- Table of Contents
- General Description
- Central Processing Unit (CPU)
- Pinout and Signal Description
- System Configuration
- Registers
- Operating Modes
- Resource Mapping
- Bus Control and Input/Output
- Resets and Interrupts
- Voltage Regulator (VREG)
- Flash EEPROM 256K
- EEPROM 4K
- Port Integration Module
- Clocks and Reset Generator (CRG)
- Pulse Width Modulator (PWM)
- Enhanced Capture Timer (ECT)
- Serial Communications Interface (SCI)
- Serial Peripheral Interface (SPI)
- Inter-IC Bus (IIC)
- MSCAN
- Analog to Digital Converter
- Byte Data Link Controller Module
- Contents
- Overview
- Features
- Block Diagram
- Register Map
- Functional Description
- Register Descriptions
- External Pin Descriptions
- Reset Initialization/Basic Operation
- Transmitting A Message
- Receiving A Message
- Transmitting An In-Frame Response (IFR)
- Receiving An In-Frame Response (IFR)
- Special BDLC Operations
- Modes of Operation
- Interrupt Operation
- Low Power Options
- Background Debug Module (BDM)
- Breakpoint (BKP) Module
- Revision History
- Glossary
- Literature Updates

Serial Communications Interface (SCI)
MC9S12DP256 — Revision 1.1
Serial Communications Interface (SCI)
Figure 72 shows the effect of noise early in the start bit time. Although
this noise does not affect proper synchronization with the start bit time,
it does set the noise flag.
Figure 72 Start Bit Search Example 4
Figure 73 shows a burst of noise near the beginning of the start bit that
resets the RT clock. The sample after the reset is low but is not preceded
by three high samples that would qualify as a falling edge. Depending on
the timing of the start bit search and on the data, the frame may be
missed entirely or it may set the framing error flag.
Figure 73 Start Bit Search Example 5
RESET RT CLOCK
RT1
RT1
RT1
RT1
RT1
RT1
RT1
RT1
RT1
RT1
RT2
RT3
RT4
RT7
RT6
RT5
RT10
RT9
RT8
RT14
RT13
RT12
RT11
RT15
RT16
RT1
RT2
RT3
SAMPLES
RT CLOCK
RT CLOCK COUNT
PERCEIVED AND ACTUAL START BIT
sci_rx_ind
11111001
LSB
11 1 1
RESET RT CLOCK
RT1
RT1
RT1
RT1
RT1
RT1
RT1
RT1
RT1
RT1
RT2
RT3
RT4
RT7
RT6
RT5
RT1
RT1
RT1
RT1
RT1
RT1
RT1
RT1
RT1
RT1
RT1
RT1
SAMPLES
RT CLOCK
RT CLOCK COUNT
START BIT
sci_rx_ind
11111010
LSB
11 1 1 1 0000000 0
NO START BIT FOUND
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
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