Datasheet

Serial Communications Interface (SCI)
MC9S12DP256 — Revision 1.1
Serial Communications Interface (SCI)
Break Characters Writing a logic 1 to the send break bit, SBK, in SCI control register 2
(SCICR2) loads the transmit shift register with a break character. A
break character contains all logic 0s and has no start, stop, or parity bit.
Break character length depends on the M bit in SCI control register 1
(SCICR1). As long as SBK is at logic 1, transmitter logic continuously
loads break characters into the transmit shift register. After software
clears the SBK bit, the shift register finishes transmitting the last break
character and then transmits at least one logic 1. The automatic logic 1
at the end of a break character guarantees the recognition of the start bit
of the next frame.
The SCI recognizes a break character when a start bit is followed by
eight or nine logic 0 data bits and a logic 0 where the stop bit should be.
Receiving a break character has these effects on SCI registers:
• Sets the framing error flag, FE
• Sets the receive data register full flag, RDRF
• Clears the SCI data registers (SCIDRH/L)
• May set the overrun flag, OR, noise flag, NF, parity error flag, PE,
or the receiver active flag, RAF (see SCI Status
Register 1(SCISR1) and SCI Status Register 2 (SCISR2))
Idle Characters An idle character contains all logic 1s and has no start, stop, or parity bit.
Idle character length depends on the M bit in SCI control register 1
(SCICR1). The preamble is a synchronizing idle character that begins
the first transmission initiated after writing the TE bit from 0 to 1.
If the TE bit is cleared during a transmission, the sci_tx_do signal
becomes idle after completion of the transmission in progress. Clearing
and then setting the TE bit during a transmission queues an idle
character to be sent after the frame currently being transmitted.
NOTE: When queueing an idle character, return the TE bit to logic 1 before the
stop bit of the current frame shifts out through the sci_tx_do signal.
Setting TE after the stop bit appears on sci_tx_do causes data
previously written to the SCI data register to be lost. Toggle the TE bit
for a queued idle character while the TDRE flag is set and immediately
before writing the next byte to the SCI data register.
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
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