Datasheet

Table Of Contents
Serial Communications Interface (SCI)
MC9S12DP256 — Revision 1.1
Serial Communications Interface (SCI)
Synchronization with the bus clock can cause phase shift.
Figure 69 lists some examples of achieving target baud rates with a
module clock frequency of 25 MHz
SCI baud rate = SCI module clock / (16 *SCIBR[12:0])
NOTE:
The maximum divider rate is 8191.
Table 69 Baud Rates (Example: Module Clock = 25.0 MHz)
Bits
SBR[12-0]
Receiver
Clock (Hz)
Transmitter
Clock (Hz)
Target
Baud Rate
Error
(%)
14 1785714 111607 115200 -3.12
27 925926 57870 57600 0.47
41 609756 38110 38,400 -0.76
81 308642 19290 19,200 0.47
163 153374 9586 9600 -0.15
326 76687 4793 4800 -0.15
651 38402 2400 2400 0.01
1302 19201 1200 1200 0.01
2604 9601 600 600 0.01
5208 4800 300 300 0.01
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